Electronic Design Automation (EDA) tools are software applications used by engineers in the design, development, simulation, and verification of electronic systems and integrated circuits. These tools typically process specifications written in a Hardware Description Language (HDL), such as Verilog, SystemVerilog or VHDL. Thus, effective testing of these tools requires programs written in these languages. There are existing resources to provide such input, such as ChiGen, a probabilistic Verilog generator, and ChiBench, a curated suite of Verilog programs from open-source repositories. This study presents the development of an open-source experimental framework designed to evaluate the code coverage achieved by Verilog fuzzers and benchmark suites. The framework automates the execution of coverage experiments, while enabling extensibility and reproducibility. Experiments were conducted on widely used open-source EDA tools to assess the testing effectiveness of both ChiGen and ChiBench. The study underscores the utility of ChiGen and ChiBench for testing EDA tools and highlights the framework’s broader applicability to general code coverage experiments.